Senior Digital Design Engineer - MCU

About the role

NXP is expanding its Catania team to develop high‑impact micro‑controllers for AI at the Edge. As a Senior Digital Design Engineer you will lead the full digital IC design flow for complex System‑on‑Chip (SoC) solutions.

Key responsibilities

• Lead specification definition, architectural design, RTL coding (Verilog/SystemVerilog), synthesis, static timing analysis, formal verification, and power analysis for complex SoCs.
• Collaborate with analog, mixed‑signal, and software teams to define interfaces, optimise system performance and ensure seamless integration.
• Develop innovative digital architectures and design methodologies to meet performance, power and area targets.
• Perform comprehensive verification using simulation, formal methods and hardware emulation, and support post‑silicon validation and debug.
• Mentor junior engineers, produce detailed design documentation and drive continuous improvement of design processes.

Required profile

• Master's degree in Electrical or Electronics Engineering or a related field.
• Minimum 5 + years of experience in digital IC design.
• Strong problem‑solving, analytical and debugging skills.
• Excellent communication and ability to work collaboratively in a team.

Required skills

• Verilog/SystemVerilog for RTL design and verification.
• Industry‑standard EDA tools: Synopsys Design Compiler, Cadence Genus, PrimeTime, Synopsys Formality, VCS, QuestaSim.
• Static timing analysis, power analysis, low‑power design techniques.
• Scripting languages for automation (Python, Perl, Tcl).
• Experience with DFT implementation and mixed‑signal integration challenges.

What we offer

• Competitive gross annual base salary between 50,600 € and 69,600 €.
• Equal pay for equal work, transparent remuneration practices and additional incentive or equity opportunities.
• Opportunity to work on world‑class edge processing products in a fast‑paced, innovative environment.