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Junior Digital Design Engineer - MCU

nxp · Catania

New
Junior 38,000 - 52,300 EUR/year 🇬🇧 English
Verilog SystemVerilog RTL coding synthesis static timing analysis formal verification power analysis UVM EDA tools

Job description

About the role

NXP is expanding its Catania team to develop high‑impact micro‑controllers for AI at the Edge. As a Junior Digital Design Engineer you will work on complex System‑on‑Chip (SoC) digital sub‑circuits, collaborating with analog, mixed‑signal and software groups.

Key responsibilities

  • Develop digital sub‑circuits based on specifications using RTL coding (Verilog/SystemVerilog), synthesis, static timing analysis, formal verification and power analysis.
  • Contribute to Design‑for‑Test (DfT) implementation, verification and debugging.
  • Collaborate with analog, mixed‑signal and software teams to define interfaces and optimise system performance.
  • Perform comprehensive design verification with simulation, formal methods and hardware emulation.
  • Participate in post‑silicon validation and debug activities.
  • Generate detailed design documentation, including specifications, test plans and design reviews.

Required profile

  • Bachelor’s or Master’s degree in Electrical/Electronics Engineering or a related field.
  • Problem‑solving attitude, attention to detail and ability to work in a team‑oriented environment.

Required skills

  • Proficiency in Verilog/SystemVerilog for RTL design and verification.
  • Familiarity with industry‑standard EDA tools for RTL coding, synthesis, static timing analysis and formal verification.
  • Understanding of digital circuit design, timing analysis, power integrity and low‑power techniques.
  • Basic knowledge of UVM (a plus).

Questions fréquentes

Le salaire proposé pour ce poste est de 38-52k EUR par an. Le détail figure dans l'annonce.
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Published 2 hours ago

Expires 1 month from now

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nxp

Catania